Lead Digital Design Verification Engineer – UVM (76931) Full Time

MA-Cambridge, Title: ASIC Verification Engineer – UVM Location: Cambridge MA (remote is available) Duration: 12 months with likely extensions Clearance: Active preferred, will process for secret clearance if needed Main requirement: Ability to create a UVM testbench from scratch. Overview: The Digital Design Team is seeking a motivated and experienced Senior Verification Engineer to tackle novel verification ch

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